SH7144_08 Datasheet, PDF (694/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

18. I/O Ports
18.5 Port E
Port E in the SH7144 is an input/output port with the 16 pins shown in figure 18.7.
Port E
PE15 (I/O) / TIOC4D (I/O) / DACK1 (output) / IRQOUT (output)
PE14 (I/O) / TIOC4C (I/O) / DACK0 (output)
PE13 (I/O) / TIOC4B (I/O) / MRES (input)
PE12 (I/O) / TIOC4A (I/O) / TXD3 (output)
PE11 (I/O) / TIOC3D (I/O) / RXD3 (input)
PE10 (I/O) / TIOC3C (I/O) / TXD2 (output)
PE9 (I/O) / TIOC3B (I/O) / SCK3 (I/O)
PE8 (I/O) / TIOC3A (I/O) / SCK2 (I/O)
PE7 (I/O) / TIOC2B (I/O) / RXD2 (input)
PE6 (I/O) / TIOC2A (I/O) / SCK3 (I/O)
PE5 (I/O) / TIOC1B (I/O) / TXD3 (output)
PE4 (I/O) / TIOC1A (I/O) / RXD3 (input) / TCK (input)*
PE3 (I/O) / TIOC0D (I/O) / DRAK1 (output) / TDO (output)*
PE2 (I/O) / TIOC0C (I/O) / DREQ1 (input) / TDI (input)*
PE1 (I/O) / TIOC0B (I/O) / DRAK0 (output) / TRST (input)*
PE0 (I/O) / TIOC0A (I/O) / DREQ0 (input) / TMS (input)*
Note: * Only for the F-ZTAT version (no corresponding function in the masked ROM version and
ROM less version).
Figure 18.7 Port E (SH7144)
Rev.4.00 Mar. 27, 2008 Page 650 of 882
REJ09B0108-0400