SH7144_08 Datasheet, PDF (448/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

13. Serial Communication Interface (SCI)
Bit Bit Name Initial Value R/W Description
2 TEIE
0
R/W Transmit End Interrupt Enable
When this bit is set to 1, a TEI interrupt request is
enabled.
TEI cancellation can be performed by reading 1 from
the TDRE flag in SSR, then clearing it to 0 and
clearing the TEND flag to 0, or clearing the TEIE bit
to 0.
1 CKE1
0
R/W Clock Enable 1 and 0
0 CKE0
0
R/W Select the clock source and SCK pin function.
Asynchronous mode:
00: Internal clock, SCK pin used for input pin (input
signal is ignored) or output pin (output level is
undefined)
01: Internal clock, SCK pin used for clock output
(The output clock frequency is the same as the
bit rate)
10: External clock, SCK pin used for clock input (The
input clock frequency is 16 times the bit rate)
11: External clock, SCK pin used for clock input (The
input clock frequency is 16 times the bit rate)
Clocked synchronous mode:
00: Internal clock, SCK pin used for synchronous
clock output
01: Internal clock, SCK pin used for synchronous
clock output
10: External clock, SCK pin used for synchronous
clock input
11: External clock, SCK pin used for synchronous
clock input
Rev.4.00 Mar. 27, 2008 Page 404 of 882
REJ09B0108-0400