SH7144_08 Datasheet, PDF (72/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

2. CPU
Addressing
Mode
Immediate
addressing
Instruction
Format
Effective Address Calculation
#imm:8
The 8-bit immediate data (imm) for the TST, AND,
OR, and XOR instructions is zero-extended.
#imm:8
The 8-bit immediate data (imm) for the MOV, ADD,
and CMP/EQ instructions is sign-extended.
#imm:8
The 8-bit immediate data (imm) for the TRAPA
instruction is zero-extended and then quadrupled.
Equation
—
—
—
Rev.4.00 Mar. 27, 2008 Page 28 of 882
REJ09B0108-0400