SH7144_08 Datasheet, PDF (606/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

16. Compare Match Timer (CMT)
16.2.3 Compare Match Timer Counter_0, 1 (CMCNT_0, CMCNT_1)
The compare match timer counter (CMCNT) is a 16-bit register used as an up-counter for
generating interrupt requests.
The initial value of CMCNT is H'0000.
16.2.4 Compare Match Timer Constant Register_0, 1 (CMCOR_0, CMCOR_1)
The compare match timer constant register (CMCOR) is a 16-bit register that sets the period for
compare match with CMCNT.
The initial value of CMCOR is H'FFFF.
Rev.4.00 Mar. 27, 2008 Page 562 of 882
REJ09B0108-0400