HD64F2168 Datasheet, PDF (858/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Port Name
Pin Name
MCU
Operating
Mode
Port 95 to 93 (EXPE = 1)
AS, IOS,
HWR, RD
Reset
Hardware Software
Standby Standby
Mode
Mode
T
T
H
Watch Sleep
Mode Mode
H
H
Subsleep Subactive
Mode
Mode
H
AS/IOS,
HWR/RD
Program
Execution
State
AS/IOS,
HWR/RD
(EXPE = 0)
Port 92 and (EXPE = 1)
T
T
91
CPCS1
kept
kept kept kept
I/O port
I/O port
kept
kept kept
kept
CPCS1/
CPCS1/
I/O port
I/O port
(EXPE = 0)
Port 90
(EXPE = 1)
T
T
LWR
H/kept
H/kept H/kept H/kept
I/O port
LWR/
I/O port
I/O port
LWR/
I/O port
(EXPE = 0)
kept
kept kept kept
I/O port
I/O port
Port A
(EXPE = 1)
T
T
A23 to A16
kept*
kept* kept* kept*
Address
output/
I/O port
Address
output/
I/O port
(EXPE = 0)
I/O port
I/O port
Port B
(EXPE = 1)
T
T
kept
kept kept kept
I/O port
I/O port
(EXPE = 0)
Port C
(EXPE = 1)
T
T
kept
kept kept kept
I/O port
I/O port
(EXPE = 0)
Port D
(EXPE = 1)
T
T
kept
kept kept kept
I/O port
I/O port
(EXPE = 0)
Port E
(EXPE = 1)
T
T
kept
kept kept kept
I/O port
I/O port
(EXPE = 0)
Port F
(EXPE = 1)
T
T
kept
kept kept kept
I/O port
I/O port
(EXPE = 0)
Legend
H: High level
L:
Low level
T:
High impedance
kept:
Input ports are in the high-impedance state (when DDR = 0 and PCR = 1, the input pull-up
MOS remains on).
Output ports maintain their previous state.
Depending on the pins, the on-chip peripheral modules may be initialized and the I/O port
function determined by DDR and DR.
DDR: Data direction register
Note: * In the case of address output, the last address accessed is retained.
Rev. 3.00, 03/04, page 818 of 830