HD64F2168 Datasheet, PDF (183/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

(2) In Address-Data Multiplex Extended Mode
(a) Program Wait Mode: Program wait mode includes address wait and data wait.
256-kbyte extended area and IOS extended area:
Zero or one state of address wait T_AW is inserted between T₁ and T₂ states. Zero to three states of
data wait T_DSW is inserted between T₄ and T₅ states.
CP extended area:
Zero or one state of address wait T_AW is inserted between T₁ and T₂ states. Zero to three states of
data wait T_DSW is inserted between T₄ and T₅ states.
(b) Pin Wait Mode: When accessing the external address space, a specified number of wait states
T_DSW can be inserted between the T₄ state and T₅ state of data state. The number of wait states T_DSW
is specified by the settings of the WC1 and WC0 bits (the WC21 and WC20 bits for the CP
extended area). If the WAIT pin is low at the falling edge of φ in the last T₄, T_DSW, or T_DOW state,
another T_DOW state is inserted. If the WAIT pin is held low, T_DOW states are inserted until it goes
high.
Pin wait mode is useful when inserting four or more T_DOW states, or when changing the number of
T_DOW states to be inserted for each external device.
(c) Pin Auto-Wait Mode: A specified number of wait states T_DOW are inserted between the T₄ state
and T₅ state when accessing the external address space if the WAIT pin is low at the falling edge
of φ in the last T₄ state. The number of wait states T_DOW is specified by the settings of the WC1 and
WC0 bits (the WC21 and WC20 bits for the CP extended area). Even if the WAIT pin is held low,
T_DOW states are inserted only up to the specified number of states.
Pin auto-wait mode enables the low-speed memory interface only by inputting the chip select
signal to the WAIT pin.
Figure 6.26 shows an example of wait state insertion timing in pin wait mode.
Rev. 3.00, 03/04, page 143 of 830