HD64F2168 Datasheet, PDF (306/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

10.3.3 PWMX (D/A) Control Register (DACR)
DACR enables the PWM outputs, and selects the output phase and operating speed.
Bit Bit Name
7
6 PWME
5, 4 
3 OEB
2 OEA
1 OS
0 CKS
Initial Value R/W
0
R/W
0
R/W
All 1
R
0
R/W
0
R/W
0
R/W
0
R/W
Description
Reserved
The initial value should not be changed.
PWMX Enable
Starts or stops the PWM D/A counter (DACNT).
0: DACNT operates as a 14-bit up-counter
1: DACNT halts at H'0003
Reserved
These bits are always read as 1 and cannot be
modified.
Output Enable B
Enables or disables output on PWMX (D/A) channel B.
0: PWMX (D/A) channel B output (at the PWX1, PWX3
pins) is disabled
1: PWMX (D/A) channel B output (at the PWX1, PWX3
pins) is enabled
Output Enable A
Enables or disables output on PWMX (D/A) channel A.
0: PWMX (D/A) channel A output (at the PWX0, PWX2
pin) is disabled
1: PWMX (D/A) channel A output (at the PWX0, PWX2
pins) is enabled
Output Select
Selects the phase of the PWMX (D/A) output.
0: Direct PWMX (D/A) output
1: Inverted PWMX (D/A) output
Clock Select
Selects the PWMX (D/A) resolution. Eight kinds of
resolution can be selected.
0: Operates at resolution (T) = system clock cycle time
(t )
cyc
1: Operates at resolution (T) = system clock cycle time
(t_cyc) × 2, × 64, × 128, × 256, × 1024, × 4096, and ×
16384.
Rev. 3.00, 03/04, page 266 of 830