HD64F2168 Datasheet, PDF (310/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 10.3 Settings and Operation (Examples when φ = 33 MHz)
PCSR
PWCKX0
PWCKX1
CB A
Reso-
lution
T
CKS (µs)
Base
CFS Cycle
Conver-
sion
Cycle
TL/TH
(OS = 0/OS = 1)
Fixed DADR Bits
Accuracy
(Bits)
Bit Data
Conversion
Cycle (ms)*
  0
0.03 0 1.94
496.48
(µs)
(µs)
/515.6kHz
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF ¹⁰
0.50
0 0 0.12
0 0 0 0 0.03
1 7.76
496.48 Always low/high output
14
DA13 to 0 = H'0000 to H'003F
(µs)
(µs)
12
(Data value) × T
(φ)
/128.9kHz
DA13 to 0 = H'0040 to H'3FFF ¹⁰
0.50
0 0 0.12
0 0 0 0 0.03
00 0 1
0.06 0 3.88
0.99
(µs)
(ms)
/257.8kHz
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF ¹⁰
0.99
0 0 0.25
0 0 0 0 0.06
1 15.52
0.99
(µs)
(ms)
(φ/2)
/64.5kHz
Always low/high output
14
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF ¹⁰
0.99
0 0 0.25
0 0 0 0 0.06
00 1 1
1.94 0 124.12
(µs)
/8.1kHz
31.78
(ms)
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF ¹⁰
31.78
0 0 7.94
0 0 0 0 1.99
1
(φ/64)
496.48
(µs)
/2.0kHz
31.78
(ms)
Always low/high output
14
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF ¹⁰
31.78
0 0 7.94
0 0 0 0 1.99
01 0 1
3.88 0 248.24
(µs)
/4.0kHz
63.55
(ms)
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF ¹⁰
63.55
0 0 15.89
0 0 0 0 3.97
1
(φ/128)
992.97
(µs)
/1.0kHz
63.55
(ms)
Always low/high output
14
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF ¹⁰
63.55
0 0 15.89
0 0 0 0 3.97
Rev. 3.00, 03/04, page 270 of 830