HD64F2168 Datasheet, PDF (137/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

5.6.5 DTC Activation by Interrupt
The DTC can be activated by an interrupt. In this case, the following options are available:
• Interrupt request to CPU
• Activation request to DTC
• Both of the above
For details of interrupt requests that can be used to activate the DTC, see section 7, Data Transfer
Controller (DTC). Figure 5.9 shows a block diagram of the DTC and interrupt controller.
Interrupt
request
IRQ
interrupt
Interrupt source
On-chip _{clear signal}
peripheral
module
Selection
circuit
Select
signal
Clear signal
DTCER
DTVECR
SWDTE
clear signal
Control logic
Interrupt controller
Determination of
priority
DTC activation
request vector
number
Clear signal
DTC
CPU interrupt
request vector
number
I, UI
CPU
Figure 5.9 Interrupt Control for DTC
The interrupt controller has three main functions in DTC control.
Selection of Interrupt Source: It is possible to select DTC activation request or CPU interrupt
request with the DTCE bit of DTCERA to DTCERE in the DTC. After a DTC data transfer, the
DTCE bit can be cleared to 0 and an interrupt request sent to the CPU in accordance with the
specification of the DISEL bit of MRB in the DTC. When the DTC performs the specified number
of data transfers and the transfer counter reaches 0, following the DTC data transfer the DTCE bit
is cleared to 0 and an interrupt request is sent to the CPU.
Determination of Priority: The DTC activation source is selected in accordance with the default
priority order, and is not affected by mask or priority levels. See section 7.5, Location of Register
Information and DTC Vector Table, for the respective priorities.
Rev. 3.00, 03/04, page 97 of 830