HD64F2168 Datasheet, PDF (470/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

14.11.3 CRC Operation Circuit Operation
The CRC operation circuit generates a CRC code for LSB-first/MSB-first communications. An
example in which a CRC code for hexadecimal data H'F0 is generated using the X¹⁶ + X¹² + X⁵ + 1
polynomial with the G1 and G0 bits in CRCCR set to B'11 is shown below.
1. Write H'83 to CRCCR
7
0
CRCCR
1 0 0 0 0 0 11
CRCDORH
CRCDORL
7
00
00
CRCDOR clearing
0
0 0 0 0 00
0 0 0 0 00
2. Write H'F0 to CRCDIR
7
0
CRCDIR
1 1 1 1 0 0 00
CRC code generation
7
0
CRCDORH 1 1 1 1 0 1 1 1
CRCDORL 1 0 0 0 1 1 1 1
3. Read from CRCDOR
CRC code = H'F78F
4. Serial transmission (LSB first)
7
1 1 110 11
F
7
CRC code
07
11 0 001
8
0
1 11
F
Data
7
1 1 110
F
0
0 00
0
Figure 14.46 LSB-First Data Transmission
Output
1. Write H'87 to CRCCR
7
0
CRCCR
1 0 0 0 0 1 11
CRCDORH
CRCDORL
7
00
00
CRCDOR clearing
0
0 0 0 0 00
0 0 0 0 00
2. Write H'F0 to CRCDIR
7
0
CRCDIR
1 1 1 1 0 0 00
CRC code generation
7
0
CRCDORH 1 1 1 0 1 1 1 1
CRCDORL 0 0 0 1 1 1 1 1
3. Read from CRCDOR
CRC code = H'EF1F
4. Serial transmission (MSB first)
Data
Output
7
1 1 110
F
00
0
07
01
1 101
E
CRC code
07
1 11 0 0 0 1 1
F
1
0
1 11
F
Figure 14.47 MSB-First Data Transmission
Rev. 3.00, 03/04, page 430 of 830