HD64F2168 Datasheet, PDF (484/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 15.3 I²C bus Transfer Rate (1)
• TCSS = 0
STCR/
ICMR
IICX3 Bit 5 Bit 4 Bit 3
Transfer Rate (MHz)
φ=5
IICXn CKS2 CKS1 CKS0 ^Clock MHz
φ=8
MHz
φ = 10
MHz
φ = 16
MHz
φ = 20
MHz
φ = 25
MHz
φ = 33
MHz
0
0
0
0
φ/28
178.6 285.7 357.1 571.4*¹ 714.3*¹ 892.9*¹ 1178.6*¹
1
φ/40
125.0 200.0 250.0 400.0 500.0*¹ 625.0*¹ 825.0*¹
1
0
φ/48
104.2 166.7 208.3 333.3 416.7*¹ 520.8*¹ 687.5*¹
1
φ/64
78.1
125.0 156.3 250.0 312.5 390.6 515.6*¹
1
0
0
φ/80
62.5
100.0 125.0 200.0 250.0 312.5 412.5*¹
1
φ/100 50.0
80.0
100.0 160.0 200.0 250.0 330.0*²
1
0
φ/112 44.6
71.4
89.3
142.9 178.6 223.2 294.6*²
1
φ/128 39.1
62.5
78.1
125.0 156.3 195.3 257.8*²
1
0
0
0
φ/56
89.3
142.9 178.6 285.7 357.1 446.4*¹ 589.3*¹
1
φ/80
62.5
100.0 125.0 200.0 250.0 312.5 412.5*¹
1
0
φ/96
52.1
83.3
104.2 166.7 208.3 260.4 343.8
1
φ/128 39.1 62.5 78.1 125.0 156.3 195.3 257.8
1
0
0
φ/160 31.3 50.0 62.5 100.0 125.0 156.3 206.3
1
φ/200 25.0 40.0 50.0 80.0 100.0 125.0 165.0
1
0
φ/224 22.3 35.7 44.6 71.4 89.3 111.6 147.3
1
φ/256 19.5 31.3 39.1 62.5 78.1 97.7 128.9
Notes: 1. The correct operation cannot be guaranteed since the value is outside the I²C bus
interface specifications (high-speed mode: max. 400 kHz)
2. When operate IIC in this setting, see 5 in section 15.6, Usage Notes.
(n = 0 to 5)
Rev. 3.00, 03/04, page 444 of 830