HD64F2168 Datasheet, PDF (574/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
0 OBF3A 0
R/(W)* R Output Data Register Full
Indicates whether or not there is transmit data in
ODR3.
0: There is not transmit data in ODR3
[Clearing condition]
When the host processor reads ODR3 using I/O
read cycle, or the slave processor writes 0 to the
OBF3A bit
1: There is transmit data in ODR3
[Setting condition]
When the slave processor writes to ODR3
Note: * Only 0 can be written to clear the flag.
• STR3
(When TWRE = 0 and SELSTR3 = 1)
R/W
Bit Bit Name Initial Value Slave Host Description
7 DBU37 All 0
6 DBU36
5 DBU35
4 DBU34
3 C/D3
0
R/W R
Defined by User
The user can use these bits as necessary.
R R Command/Data
When the host processor writes to an IDR3 register,
bit 2 of the I/O address is written into this bit to
indicate whether IDR3 contains data or a command.
0: Content of input data register (IDR3) is data
1: Content of input data register (IDR3) is a command
2 DBU32 0
R/W R Defined by User
The user can use this bit as necessary.
Rev. 3.00, 03/04, page 534 of 830