HD64F2168 Datasheet, PDF (39/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 16.7
Table 16.8
Table 16.9
Table 16.10
Table 16.11
Table 16.12
Table 16.13
Fast A20 Gate Output Signals............................................................................... 576
Scope of LPC Interface Pin Shutdown ................................................................. 578
Scope of Initialization in Each LPC Interface Mode ............................................ 579
Serial Interrupt Transfer Cycle Frame Configuration ....................................... 582
Receive Complete Interrupts and Error Interrupt.............................................. 584
HIRQ Setting and Clearing Conditions............................................................. 585
Host Addresses Example .................................................................................. 588
Section 17 D/A Converter
Table 17.1 Pin Configuration.................................................................................................. 590
Table 17.2 D/A Channel Enable ............................................................................................. 592
Section 18 A/D Converter
Table 18.1 Pin Configuration.................................................................................................. 597
Table 18.2 Analog Input Channels and Corresponding ADDR Registers .............................. 598
Table 18.3 A/D Conversion Time (Single Mode)................................................................... 603
Table 18.4 A/D Converter Interrupt Source............................................................................ 604
Section20 Flash Memory (0.18-µm F-ZTAT Version)
Table 20.1 Comparison of Programming Modes.................................................................... 614
Table 20.2 Pin Configuration.................................................................................................. 620
Table 20.3 Register/Parameter and Target Mode ................................................................... 621
Table 20.4 Parameters and Target Modes............................................................................... 629
Table 20.5 Setting On-Board Programming Mode ................................................................. 638
Table 20.6 System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI......... 640
Table 20.7 Executable MAT................................................................................................... 656
Table 20.8 (1) Useable Area for Programming in User Program Mode............................... 657
Table 20.8 (2) Useable Area for Erasure in User Program Mode......................................... 659
Table 20.8 (3) Useable Area for Programming in User Boot Mode..................................... 661
Table 20.8 (4) Useable Area for Erasure in User Boot Mode............................................... 663
Table 20.9 Hardware Protection ............................................................................................. 665
Table 20.10 Software Protection........................................................................................... 666
Table 20.11 Inquiry and Selection Commands ..................................................................... 674
Table 20.12 Programming/Erasing Command...................................................................... 685
Table 20.13 Status Code ....................................................................................................... 694
Table 20.14 Error Code ........................................................................................................ 694
Section 21 Boundary Scan (JTAG)
Table 21.1 Pin Configuration.................................................................................................. 699
Table 21.2 JTAG Register Serial Transfer.............................................................................. 700
Table 21.3 Correspondence between Pins and Boundary Scan Register ................................ 704
Section 22 Clock Pulse Generator
Table 22.1 Damping Resistance Values ................................................................................. 722
Table 22.2 Crystal Resonator Parameters ............................................................................... 723
Table 22.3 PFSEL and Multipliers ......................................................................................... 724
Rev. 3.00, 03/04, page xxxix of xl