HD64F2168 Datasheet, PDF (505/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

15.4 Operation
15.4.1 I²C Bus Data Format
The I²C bus interface has an I²C bus format and a serial format.
The I²C bus formats are addressing formats with an acknowledge bit. These are shown in figures
15.3 (a) and (b). The first frame following a start condition always consists of 9 bits.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
15.4.
Figure 15.5 shows the I²C bus timing.
The symbols used in figures 15.3 to 15.5 are explained in table 15.8.
(a) FS = 0 or FSX = 0
S
SLA
R/W A
1
7
11
1
DATA
n
A
1
m
(b) Start condition retransmission FS = 0 or FSX = 0
S
SLA
R/W A
DATA
A/A S
1
7
11
n1
11
1
m1
A/A P
11
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
SLA
R/W A
7
11
1
DATA
n2
m2
A/A P
11
Upper row: Transfer bit count (n1, n2 = 1 to 8)
Lower row: Transfer frame count (m1, m2 = from 1)
Figure 15.3 I²C Bus Data Formats (I²C Bus Formats)
FS=1 and FSX=1
S
DATA
1
8
1
DATA
n
m
P
1 _{Transfer bit count}
(n = 1 to 8)
Transfer frame count
(m = from 1)
Figure 15.4 I²C Bus Data Formats (Serial Formats)
Rev. 3.00, 03/04, page 465 of 830