HD64F2168 Datasheet, PDF (763/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 22.2 Crystal Resonator Parameters
Frequency(MHz)
5
8
10
12
16
20
25
R
S
(max)
(Ω)
C (max) (pF)
0
100
80
70
60
50
40
30
7
7
7
7
7
7
7
22.1.2 External Clock Input Method
Figure 22.4 shows a typical method of connecting an external clock signal. To leave the XTAL pin
open, incidental capacitance should be 10 pF or less.
To input an inverted clock to the XTAL pin, the external clock should be set to high in standby
mode, subactive mode, subsleep mode, and watch mode. The frequency of the external clock
should be the same as that of the system clock (φ) when PFSEL is high. When PFSEL is low, an
external clock of 1/4 times the frequency of the system clock (φ) should be used.
EXTAL
XTAL
Open
External clock input
(a) Example of external clock input when XTAL pin left open
EXTAL
XTAL
External clock input
(b) Example of external clock input when an inverted clock is input to XTAL pin
Figure 22.4 Example of External Clock Input
When a specified clock signal is input to the EXTAL pin, internal clock signal output is
determined after the external clock output stabilization delay time (t_DEXT) has passed. As the clock
signal output is not determined during the t_DEXT cycle, a reset signal should be set to low to hold it
in reset state. For the external clock output stabilization delay time, refer to table 25.5 and figure
25.8.
Rev. 3.00, 03/04, page 723 of 830