HD64F2168 Datasheet, PDF (171/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Bus cycle
T₁
T₂
φ
Address bus
IOS (IOSE = 1)
CS256 (CS256E = 1)
CPCS1 (CPCSE = 1)
AS * (IOSE = 0)
RD
Read D15 to D8
Valid
D7 to D0
HWR
Write
LWR
D15 to D8
Valid
Valid
D7 to D0
Valid
Note: * For external address space access, this signal is not output when the 256-kbyte expansion area
is accessed with CS256E = 1 and when the CP expansion area is accessed with CPCSE = 1.
Figure 6.9 Bus Timing for 16-Bit, 2-State Access Space (Word Access)
Rev. 3.00, 03/04, page 131 of 830