HD64F2168 Datasheet, PDF (147/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Initial
Bit Bit Name Value R/W Description
3
ADFULLE 0
R/W Address Output Full Enable
Controls the address output in access to the IOS extended
area, 256-kbyte extended area, or CP extended area. See
section 8, I/O Ports. This is not supported while ADMXE = 1.
2
EXCKS 0
R/W External Extension Clock Select
Selects the operating clock used in external extended area
access.
0: Medium-speed clock is selected as the operating clock
1: System clock (φ) is selected as the operating clock.
The operating clock is switched in the bus cycle prior to
external extended area access.
1

1
R/W Reserved
The initial value should not be changed.
0
CPCSE 0
R/W CP Extended Area Enable
Selects the extended area to be accessed.
0: External address space
1: CP extended area
Rev. 3.00, 03/04, page 107 of 830