HD64F2168 Datasheet, PDF (297/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

• PWOERB
Bit Bit Name
Initial
Value R/W Description
7 to 0 OE15 to OE8 All 0 R/W Output Enable 15 to 8
These bits, together with P2DDR, specify the P2n/PWm pin
state. Bits OE15 to OE8 correspond to outputs PW15 to PW8.
P2nDDR OEm: Pin state
0*: Port input
10: Port output or PWM 256/256 output
11: PWM output (0 to 255/256 output)
[Legend]
n = 0 to 7
m = 8 to 15
*:
Don't care
To perform PWM 256/256 output when DDR = 1 and OE = 0, the corresponding pin should be set
to port output. The corresponding pin can be set as port output in single-chip mode or when IOSE
= 1 and CS256E = 0 in SYSCR in extended mode with on-chip ROM. Otherwise, it should be
noted that an address bus is output to the corresponding pin.
DR data is output when the corresponding pin is used as port output. A value corresponding to
PWM 256/256 output is determined by the OS bit, so the value should have been set to DR
beforehand.
9.3.5 Peripheral Clock Select Register (PCSR)
PCSR selects the PWM input clock.
Bit Bit Name Initial Value R/W Description
7 PWCKX1B 0
6 PWCKX1A 0
R/W See section 10.3.4, Peripheral Clock Select Register
R/W (PCSR).
5 PWCKX0B 0
R/W
4 PWCKX0A 0
R/W
3 PWCKX1C 0
R/W
2 PWCKB 0
1 PWCKA 0
R/W PWM Clock Select B and A
R/W _{Together with bits PWCKE and PWCKS in PWSL, these}
bits select the internal clock input to TCNT in the PWM. For
details, see table 9.2.
0 PWCKX0C 0
R/W See section 10.3.4, Peripheral Clock Select Register
(PCSR).
Rev. 3.00, 03/04, page 257 of 830