HD64F2168 Datasheet, PDF (165/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

(2) 16-Bit Access Space: Figure 6.4 illustrates data alignment control for the 16-bit access space.
With the 16-bit access space, the upper data bus (D15 to D8/AD15 to AD8) and lower data bus
(D7 to D0/AD7 to AD0) are used for accesses. The amount of data that can be accessed at one
time is one byte or one word, and a longword access is executed as two word accesses.
In byte access, whether the upper or lower data bus is used is determined by whether the address is
even or odd. The upper data bus is used for even addresses, and the lower data bus for odd
addresses.
Byte size
Byte size
· Even address
· Odd address
Upper data bus Lower data bus
D15
D8 D7
D0
15
8
7
0
Word size
15
87
0
Longword
1st bus cycle
31
24 23
16
size
2nd bus cycle
15
87
0
Figure 6.4 Access Sizes and Data Alignment Control (16-bit Access Space)
Rev. 3.00, 03/04, page 125 of 830