HD64F2168 Datasheet, PDF (15/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 9 8-Bit PWM Timer (PWM).................................................................251
9.1 Features............................................................................................................................. 251
9.2 Input/Output Pins .............................................................................................................. 252
9.3 Register Descriptions ........................................................................................................ 252
9.3.1 PWM Register Select (PWSL)............................................................................. 253
9.3.2 PWM Data Registers 15 to 0 (PWDR15 to PWDR0).......................................... 255
9.3.3 PWM Data Polarity Registers A and B (PWDPRA and PWDPRB).................... 255
9.3.4 PWM Output Enable Registers A and B (PWOERA and PWOERB) ................. 256
9.3.5 Peripheral Clock Select Register (PCSR) ............................................................ 257
9.4 Operation .......................................................................................................................... 258
9.4.1 PWM Setting Example ........................................................................................ 260
9.4.2 Diagram of PWM Used as D/A Converter .......................................................... 260
Section 10 14-Bit PWM Timer (PWMX)..........................................................261
10.1 Features............................................................................................................................. 261
10.2 Input/Output Pins .............................................................................................................. 262
10.3 Register Descriptions ........................................................................................................ 262
10.3.1 PWMX (D/A) Counter (DACNT) ....................................................................... 263
10.3.2 PWMX (D/A) Data Registers A and B (DADRA and DADRB)......................... 264
10.3.3 PWMX (D/A) Control Register (DACR) ............................................................ 266
10.3.4 Peripheral Clock Select Register (PCSR) ............................................................ 267
10.4 Bus Master Interface ......................................................................................................... 268
10.5 Operation .......................................................................................................................... 269
Section 11 16-Bit Free-Running Timer (FRT) ..................................................277
11.1 Features............................................................................................................................. 277
11.2 Input/Output Pins .............................................................................................................. 279
11.3 Register Descriptions ........................................................................................................ 279
11.3.1 Free-Running Counter (FRC) .............................................................................. 280
11.3.2 Output Compare Registers A and B (OCRA and OCRB) ................................... 280
11.3.3 Input Capture Registers A to D (ICRA to ICRD) ................................................ 280
11.3.4 Output Compare Registers AR and AF (OCRAR and OCRAF) ......................... 281
11.3.5 Output Compare Register DM (OCRDM)........................................................... 281
11.3.6 Timer Interrupt Enable Register (TIER) .............................................................. 282
11.3.7 Timer Control/Status Register (TCSR)................................................................ 283
11.3.8 Timer Control Register (TCR)............................................................................. 286
11.3.9 Timer Output Compare Control Register (TOCR) .............................................. 287
11.4 Operation .......................................................................................................................... 289
11.4.1 Pulse Output......................................................................................................... 289
11.5 Operation Timing.............................................................................................................. 290
11.5.1 FRC Increment Timing ........................................................................................ 290
11.5.2 Output Compare Output Timing .......................................................................... 291
11.5.3 FRC Clear Timing ............................................................................................... 291
Rev. 3.00, 03/04, page xv of xl