HD64F2168 Datasheet, PDF (464/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Reception: Before making the transition to module stop, software standby, watch, sub-active, or
sub-sleep mode, stop reception (RE = 0). RSR, RDR, and SSR are reset. If transition is made
during data reception, the data being received will be invalid.
To receive data in the same reception mode after mode cancellation, set RE to 1, and then start
reception. To receive data in a different reception mode, initialize the SCI first.
Figure 14.42 shows a sample flowchart for mode transition during reception.
Transmission
All data transmitted?
Yes
Read TEND flag in SSR
No [1]
No
TEND = 1
Yes
TE = 0
[2]
Make transition to software standby mode etc.
[3]
Cancel software standby mode etc.
[1] Data being transmitted is lost
halfway. Data can be normally
transmitted from the CPU by
setting TE to 1, reading SSR,
writing to TDR, and clearing
TDRE to 0 after mode
cancellation; however, if the DTC
has been initiated, the data
remaining in DTC RAM will be
transmitted when TE and TIE are
set to 1.
[2] Also clear TIE and TEIE to 0
when they are 1.
[3] Module stop, watch, sub-active,
and sub-sleep modes are
included.
Change operating mode?
Yes
Initialization
No
TE = 1
Start transmission
Figure 14.39 Sample Flowchart for Mode Transition during Transmission
Rev. 3.00, 03/04, page 424 of 830