HD64F2168 Datasheet, PDF (413/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 14.6 BRR Settings for Various Bit Rates (Clock Synchronous Mode)
Operating Frequency φ (MHz)
Bit
8
Rate
10
16
20
24
(bit/s) ⁿ
N
n
N
n
N
n
N
n
N
n
110
250 3
124   3
249
500 2
249   3
124     3
1k
2
124   2
249     3
2.5k 1
199 1
249 2
99 2
124 2
149 2
5k
1
99 1
124 1
199 1
249 2
74 2
10k 0
199 0
249 1
99 1
124 1
149 1
25k 0
79 0
99 0
159 0
199 0
239 0
50k 0
39 0
49 0
79 0
99 0
119 0
100k 0
19 0
24 0
39 0
49 0
59 0
250k 0
7
0
9
0
15 0
19 0
23 0
500k 0
3
0
4
0
7
0
9
0
11 0
1M 0
1
0
3
0
4
0
5
0
2.5M
0
0*
0
1
5M
0
0*
[Legend]
: Setting prohibited.
 : Can be set, but there will be a degree of error.
*:
Continuous transfer or reception is not possible.
32
N
249
124
199
99
199
179
159
79
31
15
7
Table 14.7 Maximum Bit Rate with External Clock Input (Clock Synchronous Mode)
φ (MHz)
6
8
10
12
14
External Input
Clock (MHz)
1.0000
1.3333
1.6667
2.0000
2.3333
Maximum Bit
Rate (bit/s)
1000000.0
1333333.3
1666666.7
2000000.0
2333333.3
φ (MHz)
16
18
20
25
33
External Input
Clock (MHz)
2.6667
3.0000
3.3333
4.1667
5.5000
Maximum Bit
Rate (bit/s)
2666666.7
3000000.0
3333333.3
4166666.7
5500000.0
Rev. 3.00, 03/04, page 373 of 830