HD64F2168 Datasheet, PDF (476/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Figure 15.1 shows a block diagram of the I²C bus interface. Figure 15.2 shows an example of I/O
pin connections to external circuits. Since I²C bus interface I/O pins are different in structure from
normal port pins, they have different specifications for permissible applied voltages. For details,
see section 25, Electrical Characteristics.
ICXR
φ
SCL
PS
Noise
canceler
SDA
Noise
canceler
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
ICCR
ICMR
ICSR
ICDRT
ICDRS
ICDRR
Address comparator
SAR, SARX
[Legend]
ICCR: I²C bus control register
ICMR: I²C bus mode register
ICSR: I²C bus status register
ICDR: I²C bus data register
ICXR: I²C bus extended control register
SAR: Slave address register
SARX: Slave address register X
PS: Prescaler
Interrupt
generator
Figure 15.1 Block Diagram of I²C Bus Interface
Interrupt
generator
Rev. 3.00, 03/04, page 436 of 830