HD64F2168 Datasheet, PDF (683/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

(1) On-chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and determination of the result, must be executed in the on-chip
RAM. The on-chip program that is to be downloaded is all in the on-chip RAM. Note that area in
the on-chip RAM must be controlled so that these parts do not overlap.
Figure 20.10 shows the program area to be downloaded.
<On-chip RAM>
Area that can be used by user*
Address
RAMTOP
DPFR
(Return value: 1 byte)
FTDAR setting
Area to be
downloaded
(Size : 2 kbytes)
Unusable area in
programming/erasing
processing period
System use area
(15 bytes)
Programming/erasing program entry
Initialization program entry
Initialization + programming program
or
Initialization + erasing program
FTDAR setting + 16
FTDAR setting + 32
Area that can be used by user*
FTDAR setting + 2 kbytes
RAMEND
Note: * The on-chip RAM area in this LSI is split into H'FF0800 to H'FF97FF,
H'FFE080 to H'FFEFFF, and H'FFFF00 to H'FFFF7F.
The area that can be used by the user is specified by FTDAR.
Figure 20.10 RAM Map When Programming/Erasing is Executed
Rev. 3.00, 03/04, page 643 of 830