English
Language : 

HD64F2168 Datasheet, PDF (737/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer
Section 21 Boundary Scan (JTAG)
The JTAG (Joint Test Action Group) is standardized as an international standard, IEEE Standard
1149.1, and is open to the public as IEEE Standard Test Access Port and Boundary-Scan
Architecture. Although the name of the function is boundary scan and the name of the group who
worked on standardization is the JTAG, the JTAG is commonly used as the name of a boundary
scan architecture and a serial interface to access the devices having the architecture.
This LSI has a boundary scan function (JTAG). Using this function along with other LSIs
facilitates testing a printed-circuit board.
21.1 Features
• Five test pins (ETCK, ETDI, ETDO, ETMS, and ETRST)
• TAP controller
• Six instructions
BYPASS mode
EXTEST mode
SAMPLE/PRELOAD mode
CLAMP mode
HIGHZ mode
IDCODE mode
(These instructions are test modes corresponding to IEEE 1149.1.)
HUDS000A_000120020900
Rev. 3.00, 03/04, page 697 of 830