HD64F2168 Datasheet, PDF (583/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
1 IRQ9E2 0
R/W  Host IRQ9 Interrupt Enable 2
Enables or disables a HIRQ9 interrupt request when
OBF2 is set by an ODR2 write.
0: HIRQ9 interrupt request by OBF2 and IRQ9E2 is
disabled
[Clearing conditions]
• Writing 0 to IRQ9E2
• LPC hardware reset, LPC software reset
• Clearing OBF2 to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
HIRQ9 interrupt request by setting OBF2 to 1 is
enabled
[When IEDIR = 1]
HIRQ9 interrupt is requested.
[Setting condition]
• Writing 1 after reading IRQ9E2 = 0
0 IRQ6E2 0
R/W  Host IRQ6 Interrupt Enable 2
Enables or disables a HIRQ6 interrupt request when
OBF2 is set by an ODR2 write.
0: HIRQ6 interrupt request by OBF2 and IRQ6E2 is
disabled
[Clearing conditions]
• Writing 0 to IRQ6E2
• LPC hardware reset, LPC software reset
• Clearing OBF2 to 0 (when IEDIR = 0)
1: [When IEDIR = 0]
HIRQ6 interrupt request by setting OBF2 to 1 is
enabled
[When IEDIR = 1]
HIRQ6 interrupt is requested.
[Setting condition]
• Writing 1 after reading IRQ6E2 = 0
Rev. 3.00, 03/04, page 543 of 830