HD64F2168 Datasheet, PDF (613/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Slave
Host
Slave confirms the H_BUSY bit in BTCR.
Wait for
H_BUSY = 0
Host waits for the B2H_ATN bit (interrupt from
slave) is set by slave.
Slave writes data of 1 to n bytes to the BTDTR
buffer.
Write BTDTR buffer
Slave sets the B2H_ATN bit in BTCR to indicate
data write completion to the BTDTR buffer.
B2H_ATN = 1
Generate host
interrupt
Host confirms the B2H_ATN bit in BTCR.
The slave data write completion interrupt is notified to host.
H_BUSY = 1
Host sets the H_BUSY bit in BTCR.
Confirms the CLR_RD_PTR bit.
The CRRPI bit in BTSR1 is set to notify read
pointer clearing as an interrupt source to slave.
Clear read pointer
Host clears read pointer by setting the CLR_RD_PTR
bit in BTCR.
Generate slave
interrupt
Read BTDTR buffer Host reads data from the BTDTR buffer.
The HBTRI bit in BTSR0 is set to notify host reads
all data through the BTDTR buffer.
Generate slave
interrupt
Confirms the B2H_ATN bit.
The B2HI bit in BTSR1 is set to notify host data
read completion as an interrupt source to slave.
B2H_ATN = 0
Host clears the B2H_ATN bit in BTCR.
Generate slave
interrupt
H_BUSY = 0
Host clears the H_BUSY bit in BTCR to indicate
transfer completion.
Figure 16.7 BT Read Transfer Flow
Rev. 3.00, 03/04, page 573 of 830