HD64F2168 Datasheet, PDF (50/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Type
Symbol
Address/
data
multiplex
bus
AD15 to
AD8
AD7 to
AD0
Bus control WAIT
Pin No. I/O
96 to 103 Input/
Output
104 to 110,
112
17
Input
RD
21
HWR
20
Output
Output
LWR
24
Output
AS/IOS 19
Output
CS256 17
Output
CPCS1 22
AH
23
Output
Output
Interrupts
Boundary
scan
NMI
11
Input
IRQ15 to
IRQ0
6, 5, 137, Input
136, 134,
133, 15,
16, 4 to 2,
138, 132 to
129
ExIRQ15 43 to 50
to ExIRQ2 75 to 70
ETRST 91
Input
ETMS
87
Input
ETDO
88
Output
ETDI
89
Input
ETCK
90
Input
Name and Function
8-bit, upper 16-bit bus
Lower 16-bit bus
Requests insertion of a wait state in the bus cycle
when accessing an external 3-state address
space.
This pin is low when the external address space
is being read.
This pin is low when the external address space
is to be written to, and the upper half of the data
bus is enabled.
This pin is low when the external address space
is to be written to, and the lower half of the data
bus is enabled.
This pin is low when address output on the
address bus is valid.
Indicates that the 256k-byte area from H'F80000
to H'FBFFFF is accessed.
Indicates that the CP extended area is accessed.
Address latch signal for address/data multiplex
bus.
Nonmaskable interrupt request input pin
These pins request a maskable interrupt.
Selectable to which pin of IRQn or ExIRQn to
insert IRQ15 to IRQ2 interrupts.
Boundary scan interface pins
Rev. 3.00, 03/04, page 10 of 830