HD64F2168 Datasheet, PDF (162/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 6.14 Bus Specifications for CP Extended Area/Multiplex Bus Interface (Data Cycle)
ASTCP
0
1
WMS21 WMS20 WC22
—
—
—
0
1
—
Other than WMS21 = 0 —
and WMS20 = 1
WC21
—
—
0
1
WC20
—
—
0
1
0
1
Number of
Number of Program
Access Wait
States States
2
0
3
0
3
0
1
2
3
6.4.2 Advanced Mode
The external address space (H'FFF000 to H'FFF7FF) can be accessed by specifying the AS/IOS
pin as an I/O strobe pin. The 256-kbyte extended area (H'F80000 to H'FBFFFF) and CP extended
area (H'FFC000 to H'FFDFFF) can be accessed by the CS256 pin and CPCS1 pin functions,
respectively.
The external address space is initialized as the basic bus interface and a 3-state access space. In
mode 2, the address space other than on-chip ROM, on-chip RAM, internal I/O registers, and their
reserved areas is specified as the external address space. The on-chip RAM and its reserved area
are enabled when the RAME bit in SYSCR is set to 1, and disabled when the RAME bit is cleared
to 0. Addresses H'FF0800 to H'FFBFFF, H'FFE080 to H'FFEFFF, and H'FFFF00 to H'FFFF7F in
the on-chip RAM area and its reserved area are always specified as the external address space.
Rev. 3.00, 03/04, page 122 of 830