HD64F2168 Datasheet, PDF (660/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

20.2 Input/Output Pins
Table 20.2 shows the flash memory pin configuration.
Table 20.2 Pin Configuration
Pin Name
RES
FWE
MD2
MD1
MD0
TxD1
RxD1
Input/Output
Input
Input
Input
Input
Input
Output
Input
Function
Reset
Flash memory programming/erasing enable pin
Sets operating mode of this LSI
Sets operating mode of this LSI
Sets operating mode of this LSI
Serial transmit data output (used in boot mode)
Serial receive data input (used in boot mode)
20.3 Register Descriptions
The registers/parameters which control flash memory are shown in the following. To read from or
write to these registers/parameters, the FLSHE bit in the serial timer control register (STCR) must
be set to 1. For details on STCR, see section 3.2.3, Serial Timer Control Register (STCR).
• Flash code control status register (FCCS)
• Flash program code select register (FPCS)
• Flash erase code select register (FECS)
• Flash key code register (FKEY)
• Flash MAT select register (FMATS)
• Flash transfer destination address register (FTDAR)
• Download pass/fail result (DPFR)
• Flash pass/fail result (FPFR)
• Flash multipurpose address area (FMPAR)
• Flash multipurpose data destination area (FMPDR)
• Flash erase Block select (FEBS)
• Flash programming/erasing frequency control (FPEFEQ)
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 20.3.
Rev. 3.00, 03/04, page 620 of 830