HD64F2168 Datasheet, PDF (181/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

φ
CPCS1
CS256
IOS
AH
RD
HWR
LWR
AD15 to AD8
AD7 to AD0
Read Cycle
Address
Data
T₁ T_AW T₂
T₃
T₄ T_DSW T₅
Write Cycle
Address
Data
T₁ T_AW T₂
T₃
T₄ T_DSW T₅
Address
Address
Data
Address
Data
Data
Address
Data
Figure 6.24 Bus Timing for 16-Bit, 3-State Access Space (3) (Word Access)
6.5.5 Wait Control
When accessing the external address space, this LSI can extend the bus cycle by inserting one or
more wait states (T_W). There are three ways of inserting wait states: Program wait insertion, pin
wait insertion using the WAIT pin, and the combination of program wait and the WAIT pin.
(1) In Normal Extended Mode
(a) Program Wait Mode: A specified number of wait states T_W are always inserted between the
T₂ state and T₃ state when accessing the external address space. The number of wait states T_W is
specified by the settings of the WC1 and WC0 bits in WSCR (the WC11 and WC10 bits in
WSCR2 for the 256-kbyte extended area, and the WC21 and WC20 bits in WSCR2 for the CP
extended area).
(b) Pin Wait Mode: A specified number of wait states T_W are always inserted between the T₂ state
and T₃ state when accessing the external address space. The number of wait states T_W is specified
by the settings of the WC1 and WC0 bits (the WC21 and WC20 bits for the CP extended area). If
the WAIT pin is low at the falling edge of φ in the last T₂ or T_W state, another T_W state is inserted.
If the WAIT pin is held low, T_W states are inserted until it goes high.
Pin wait mode is useful when inserting four or more T_W states, or when changing the number of T_W
states to be inserted for each external device.
Rev. 3.00, 03/04, page 141 of 830