HD64F2168 Datasheet, PDF (336/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

11.5.9 Automatic Addition Timing
When the OCRAMS bit in TOCR is set to 1, the contents of OCRAR and OCRAF are
automatically added to OCRA alternately, and when an OCRA compare-match occurs a write to
OCRA is performed. Figure 11.14 shows the OCRA write timing.
φ
FRC
N
N +1
OCRA
N
N+A
OCRAR, OCRAF
A
Compare-match
signal
Figure 11.14 OCRA Automatic Addition Timing
11.5.10 Mask Signal Generation Timing
When the ICRDMS bit in TOCR is set to 1 and the contents of OCRDM are other than H'0000, a
signal that masks the ICRD input capture signal is generated. The mask signal is set by the input
capture signal. The mask signal is cleared by the sum of the ICRD contents and twice the
OCRDM contents, and an FRC compare-match. Figure 11.15 shows the timing of setting the mask
signal. Figure 11.16 shows the timing of clearing the mask signal.
φ
Input capture
signal
Input capture
mask signal
Figure 11.15 Timing of Input Capture Mask Signal Setting
Rev. 3.00, 03/04, page 296 of 830