HD64F2168 Datasheet, PDF (741/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

21.3.1 Instruction Register (SDIR)
SDIR is a 32-bit register. JTAG instructions can be transferred to SDIR by serial input from the
ETDI pin. SDIR can be initialized when the ETRST pin is low or the TAP controller is in the
Test-Logic-Reset state, but is not initialized by a reset or in standby mode.
Only 4-bit instructions can be transferred to SDIR. If an instruction exceeding 4 bits is input, the
last 4 bits of the serial data will be stored in SDIR.
• H8S/2168
Bit
Bit Name Initial Value
31
TS3
1
30
TS2
1
29
TS1
1
28
TS0
0
27 to 14 
All 0
13

1
12

0
11

1
10 to 1 
All 0
0

1
R/W Description
R/W Test Set Bits
R/W _{0000: EXTEST mode}
R/W
R/W ^{0001: Setting prohibited}
0010: CLAMP mode
0011: HIGHZ mode
0100: SAMPLE/PRELOAD mode
0101: Setting prohibited
:
:
1101: Setting prohibited
1110: IDCODE mode (Initial value)
1111: BYPASS mode
R Reserved
These bits are always read as 0 and cannot be
modified.
R Reserved
This bit is always read as 1 and cannot be modified.
R Reserved
This bit is always read as 0 and cannot be modified.
R Reserved
This bit is always read as 1 and cannot be modified.
R Reserved
These bits are always read as 0 and cannot be
modified.
R Reserved
This bit is always read as 1 and cannot be modified.
Rev. 3.00, 03/04, page 701 of 830