HD64F2168 Datasheet, PDF (352/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Table 12.2 Clock Input to TCNT and Count Condition
Channel
TMR_0
TMR_1
TMR_Y
CKS2
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
TCR
CKS1 CKS0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
1
0
STCR
ICKS1 ICKS0



0

1

0

1

0

1




0

1

0

1

0

1









Description
Disables clock input
Increments at falling edge of internal
clock φ/8
Increments at falling edge of internal
clock φ/2
Increments at falling edge of internal
clock φ/64
Increments at falling edge of internal
clock φ/32
Increments at falling edge of internal
clock φ/1024
Increments at falling edge of internal
clock φ/256
Increments at overflow signal from
TCNT_1*
Disables clock input
Increments at falling edge of internal
clock φ/8
Increments at falling edge of internal
clock φ/2
Increments at falling edge of internal
clock φ/64
Increments at falling edge of internal
clock φ/128
Increments at falling edge of internal
clock φ/1024
Increments at falling edge of internal
clock φ/2048
Increments at compare-match A from
TCNT_0*
Disables clock input
Increments at falling edge of internal
clock φ/4
Increments at falling edge of internal
clock φ/256
Rev. 3.00, 03/04, page 312 of 830