HD64F2168 Datasheet, PDF (848/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

SDA0
V_IH
to
SDA5
V_IL
t_BUF
t_STAH
t_SCLH
SCL0
to
SCL5
P*
S*
t_Sf
t_SCLL
t_Sr
t_SCL
t_SDAH
t_STAS
Sr*
t_SP
t_STOS
P*
t_SDAS
Note: * S, P, and Sr indicate the following conditions:
S: Start condition
P: Stop condition
Sr: Retransmission start condition
Figure 25.30 I²C Bus Interface Input/Output Timing
Table 25.12 LPC Module Timing
Conditions: VCC = 3.0 V to 3.6V, VSS = 0 V, φ = 5 MHz to 33 MHz
Item
Input clock cycle
Input clock pulse width (H)
Input clock pulse width (L)
Transmit signal delay time
Transmit signal floating
delay time
Receive signal setup time
Receive signal hold time
Symbol Min.
t
30
Lcyc
t_LCKH
11
t_LCKL
11
t
2
TXD
t
OFF

Typ.





Max. Unit
 ns


11
28
t
RXS
7

t_RXH
0

Test Conditions
Figure 25.31
Rev. 3.00, 03/04, page 808 of 830