HD64F2168 Datasheet, PDF (573/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
4 SWMF 0
R/(W)* R Slave Write Mode Flag
Indicates that slave write mode is entered by writing
to TWR0 from the slave processor (this LSI). In the
event of simultaneous writes by the master and the
slave, the master write has priority.
0: [Clearing condition]
When the host processor reads TWR15 using I/O
read cycle, or the slave processor writes 0 to the
SWMF bit
1: [Setting condition]
3 C/D3
0
When the slave processor writes to TWR0 while
MWMF = 0
R
R Command/Data
When the host processor writes to an IDR3 register,
bit 2 of the I/O address is written into this bit to
indicate whether IDR3 contains data or a command.
0: Content of input data register (IDR3) is data
1: Content of input data register (IDR3) is a
command
2 DBU32 0
R/W R Defined by User
The user can use this bit as necessary.
1 IBF3A 0
R
R Input Data Register Full
Indicates whether or not there is receive data in
IDR3. This is an internal interrupt source to the slave
processor (this LSI).
0: There is not receive data in IDR3
[Clearing condition]
When the slave processor reads IDR3
1: There is receive data in IDR3
[Setting condition]
When the host processor writes to IDR3 using I/O
write cycle
Rev. 3.00, 03/04, page 533 of 830