HD64F2168 Datasheet, PDF (595/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
4 BEVTI 0
R/(W)*  BEVT_ATN Clear Interrupt
This status flag indicates that the BEVT_ATN bit in
BTCR is cleared by the host. When the IBFIE3 bit
and BEVTIE bit are set to 1, IBFI3 interrupt is
requested to the slave.
0: [Clearing condition]
When the slave reads BEVTI = 1 and writes 0 to
this bit.
1: [Setting condition]
When the slave detects the falling edge of
BEVT_ATN.
3 B2HI
0
R/(W)*  Read End Interrupt
This status flag indicates that the host has finished
reading all data from the BTDTR buffer. When the
IBFIE3 bit and B2HIE bit are set to 1, the IBFI3
interrupt is requested to the slave.
0: [Clearing condition]
When the slave reads B2HI = 1 and writes 0 to
this bit.
1: [Setting conditions]
ATNSW = 0: When the slave detects the falling
edge of B2H_ATN.
ATNSW = 1: When the slave detects the falling
edge of H_BUSY.
2 H2BI
0
R/(W)*  Write End Interrupt
This status flag indicates that the host has finished
writing all data to the BTDTR buffer. When the
IBFIE3 bit and H2BIE bit are set to 1, the IBFI3
interrupt is requested to the slave.
0: [Clearing condition]
After the slave reads H2BI = 1, writes 0 to this bit.
1: [Setting condition]
When the slave detects the falling edge of
H2B_ATN.
Rev. 3.00, 03/04, page 555 of 830