HD64F2168 Datasheet, PDF (740/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

21.3 Register Descriptions
The JTAG has the following registers.
• Instruction register (SDIR)
• Bypass register (SDBPR)
• Boundary scan register (SDBSR)
• ID code register (SDIDR)
Instructions can be input to the instruction register (SDIR) by serial transfer from the test data
input pin (ETDI). Data from SDIR can be output via the test data output pin (ETDO). The bypass
register (SDBPR) is a 1-bit register to which the ETDI and ETDO pins are connected in BYPASS,
CLAMP, or HIGHZ mode. The boundary scan register (SDBSR) is a 334-bit register to which the
ETDI and ETDO pins are connected in SAMPLE/PRELOAD or EXTEST mode. The ID code
register (SDIDR) is a 32-bit register; a fixed code can be output via the ETDO pin in IDCODE
mode. All registers cannot be accessed directly by the CPU.
Table 21.2 shows the kinds of serial transfer possible with each JTAG register.
Table 21.2 JTAG Register Serial Transfer
Register
SDIR
SDBPR
SDBSR
SDIDR
Serial Input
Possible
Possible
Possible
Impossible
Serial Output
Possible
Possible
Possible
Possible
Rev. 3.00, 03/04, page 700 of 830