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HD64F2168 Datasheet, PDF (134/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer
Program execution state
No
Interrupt generated?
Yes
Yes
NMI
No
No
An interrupt with interrupt
control level 1?
Yes
No
IRQ0
Yes
No
IRQ1
Yes
IBFI3
Yes
Hold pending
No
IRQ0
Yes
No
IRQ1
Yes
IBFI3
Yes
I=0
Yes
No
UI = 0
Yes
No
I=0
No Yes
Save PC and CCR
I 1, UI 1
Read vector address
Branch to interrupt handling routine
Figure 5.7 Flowchart of Procedure Up to Interrupt Acceptance in Interrupt
Control Mode 1
5.6.3 Interrupt Exception Handling Sequence
Figure 5.8 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
Rev. 3.00, 03/04, page 94 of 830