HD64F2168 Datasheet, PDF (350/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

12.3.2 Time Constant Register A (TCORA)
TCORA is an 8-bit readable/writable register. TCORA_0 and TCORA_1 comprise a single 16-bit
register, so they can be accessed together by word access. TCORA is continually compared with
the value in TCNT. When a match is detected, the corresponding compare-match flag A (CMFA)
in TCSR is set to 1. Note however that comparison is disabled during the T2 state of a TCORA
write cycle. The timer output from the TMO pin can be freely controlled by these compare-match
A signals and the settings of output select bits OS1 and OS0 in TCSR. TCORA is initialized to
H'FF.
TCORA_Y can be accessed when the KINWUE bit in SYSCR is 0 and the TMRX/Y bit in
TCONRS is 1. TCORA_X can be accessed when the KINWUE bit in SYSCR is 0 and the
TMRX/Y bit in TCONRS is 0. See section 3.2.2, System Control Register (SYSCR), and section
12.3.11, Timer Connection Register S (TCONRS).
12.3.3 Time Constant Register B (TCORB)
TCORB is an 8-bit readable/writable register. TCORB_0 and TCORB_ comprise a single 16-bit
register, so they can be accessed together by word access. TCORB is continually compared with
the value in TCNT. When a match is detected, the corresponding compare-match flag B (CMFB)
in TCSR is set to 1. Note however that comparison is disabled during the T2 state of a TCORB
write cycle. The timer output from the TMO pin can be freely controlled by these compare-match
B signals and the settings of output select bits OS3 and OS2 in TCSR. TCORB is initialized to
H'FF.
TCORB_Y can be accessed when the KINWUE bit in SYSCR is 0 and the TMRX/Y bit in
TCONRS is 1. TCORB_X can be accessed when the KINWUE bit in SYSCR is 0 and the
TMRX/Y bit in TCONRS is 0. See section 3.2.2, System Control Register (SYSCR), and section
12.3.11, Timer Connection Register S (TCONRS).
Rev. 3.00, 03/04, page 310 of 830