HD64F2168 Datasheet, PDF (207/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

7.6.2 Repeat Mode
In repeat mode, one activation source transfers one byte or one word of data. Table 7.6 lists the
register functions in repeat mode. From 1 to 256 transfers can be specified. Once the specified
number of transfers has been completed, the initial states of the transfer counter and the address
register that is specified as the repeat area is restored, and transfer is repeated. In repeat mode, the
transfer counter value does not reach H'00, and therefore CPU interrupts cannot be requested when
the DISEL bit in MRB is cleared to 0.
Table 7.6 Register Functions in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Transfer source address
Transfer destination address
Holds number of transfers
Transfer Count
Not used
SAR
or
DAR
Repeat area
Transfer
DAR
or
SAR
Figure 7.6 Memory Mapping in Repeat Mode
Rev. 3.00, 03/04, page 167 of 830