HD64F2168 Datasheet, PDF (631/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

17.3 Register Descriptions
The D/A converter has the following registers.
• D/A data register 0 (DADR0)
• D/A data register 1 (DADR1)
• D/A control register (DACR)
17.3.1 D/A Data Registers 0 and 1 (DADR0, DADR1)
DADR0 and DADR1 are 8-bit readable/writable registers that store data for D/A conversion.
When analog output is permitted, D/A data register contents are converted and output to analog
output pins.
17.3.2 D/A Control Register (DACR)
DACR controls D/A converter operation.
Bit Bit Name Initial Value R/W Description
7
DAOE1 0
R/W D/A Output Enable 1
Controls D/A conversion and analog output.
0: Analog output DA1 is disabled
1: D/A conversion for channel 1 and analog output DA1
are enabled
6
DAOE0 0
R/W D/A Output Enable 0
Controls D/A conversion and analog output.
0: Analog output DA0 is disabled
1: D/A conversion for channel 0 and analog output DA0
are enabled
5
DAE
0
R/W D/A Enable
Controls D/A conversion in conjunction with the DAOE0
and DAOE1 bits. When the DAE bit is cleared to 0, D/A
conversion for channels 0 and 1 are controlled
individually. When the DAE bit is set to 1, D/A conversion
for channels 0 and 1 are controlled as one. Conversion
result output is controlled by the DAOE0 and DAOE1
bits. For details, see table 17.2 below.
4 to 0 
All 1
R Reserved
The initial value should not be changed.
Rev. 3.00, 03/04, page 591 of 830