HD64F2168 Datasheet, PDF (182/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

(c) Pin Auto-Wait Mode: A specified number of wait states T_W are inserted between the T₂ state
and T₃ state when accessing the external address space if the WAIT pin is low at the falling edge
of φ in the last T₂ state. The number of wait states T_W is specified by the settings of the WC1 and
WC0 bits (the WC21 and WC20 bits for the CP extended area). Even if the WAIT pin is held low,
T_W states are inserted only up to the specified number of states.
Pin auto-wait mode enables the low-speed memory interface only by inputting the chip select
signal to the WAIT pin.
Figure 6.25 shows an example of wait state insertion timing in pin wait mode.
The settings after a reset are: 3-state access, 3 program wait insertion, and WAIT pin input
disabled.
By program wait
By WAIT pin
T₁
T₂
T_W
T_W
T_W
T₃
φ
WAIT
Address bus
IOS (IOSE = 1)
CPCS1 (CPCSE = 1)
AS _*(IOSE = 0)
Read
RD
Data bus
Read data
Write
WR
Data bus
Write data
Note: ↓ shown in φ clock indicates the WAIT pin sampling timing.
* For external address space access, this signal is not output when the 256-kbyte expansion area
is accessed with CS256E = 1 and when the CP expansion area is accessed with CPCSE = 1.
Figure 6.25 Example of Wait State Insertion Timing (Pin Wait Mode)
Rev. 3.00, 03/04, page 142 of 830