HD64F2168 Datasheet, PDF (18/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

14.4.1 Data Transfer Format........................................................................................... 381
14.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous
Mode ................................................................................................................... 382
14.4.3 Clock.................................................................................................................... 383
14.4.4 Serial Enhanced Mode Clock .............................................................................. 383
14.4.5 SCI Initialization (Asynchronous Mode)............................................................. 386
14.4.6 Serial Data Transmission (Asynchronous Mode) ................................................ 387
14.4.7 Serial Data Reception (Asynchronous Mode) ..................................................... 389
14.5 Multiprocessor Communication Function......................................................................... 393
14.5.1 Multiprocessor Serial Data Transmission ............................................................ 395
14.5.2 Multiprocessor Serial Data Reception ................................................................. 396
14.6 Operation in Clock Synchronous Mode............................................................................ 399
14.6.1 Clock.................................................................................................................... 399
14.6.2 SCI Initialization (Clock Synchronous Mode)..................................................... 400
14.6.3 Serial Data Transmission (Clock Synchronous Mode)........................................ 401
14.6.4 Serial Data Reception (Clock Synchronous Mode) ............................................. 403
14.6.5 Simultaneous Serial Data Transmission and Reception
(Clock Synchronous Mode) ................................................................................. 405
14.6.6 SCI Selection in Serial Enhanced Mode .............................................................. 405
14.7 Smart Card Interface Description ..................................................................................... 407
14.7.1 Sample Connection.............................................................................................. 407
14.7.2 Data Format (Except in Block Transfer Mode) ................................................... 407
14.7.3 Block Transfer Mode ........................................................................................... 409
14.7.4 Receive Data Sampling Timing and Reception Margin ...................................... 409
14.7.5 Initialization......................................................................................................... 410
14.7.6 Serial Data Transmission (Except in Block Transfer Mode) ............................... 411
14.7.7 Serial Data Reception (Except in Block Transfer Mode) .................................... 414
14.7.8 Clock Output Control........................................................................................... 415
14.8 IrDA Operation ................................................................................................................. 417
14.9 Interrupt Sources............................................................................................................... 420
14.9.1 Interrupts in Normal Serial Communication Interface Mode .............................. 420
14.9.2 Interrupts in Smart Card Interface Mode ............................................................. 421
14.10 Usage Notes ...................................................................................................................... 422
14.10.1 Module Stop Mode Setting .................................................................................. 422
14.10.2 Break Detection and Processing .......................................................................... 422
14.10.3 Mark State and Break Sending ............................................................................ 422
14.10.4 Receive Error Flags and Transmit Operations
(Clock Synchronous Mode Only) ........................................................................ 422
14.10.5 Relation between Writing to TDR and TDRE Flag ............................................. 422
14.10.6 Restrictions on Using DTC.................................................................................. 423
14.10.7 SCI Operations during Mode Transitions ............................................................ 423
14.10.8 Notes on Switching from SCK Pins to Port Pins ................................................. 427
14.11 CRC Operation Circuit ..................................................................................................... 428
Rev. 3.00, 03/04, page xviii of xl