HD64F2168 Datasheet, PDF (572/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

• STR3
(When TWRE = 1 or SELSTR3 = 0)
R/W
Bit Bit Name Initial Value Slave Host Description
7 IBF3B 0
R
R Bidirectional Data Register Input Data Full
Indicates whether or not there is receive data in
TWR0 to TWR15. This is an internal interrupt source
to the slave processor (this LSI).
0: There is not receive data in TWR15
[Clearing condition]
When the slave processor reads TWR15
1: There is receive data in TWR0 to TWR15
[Setting condition]
When the host processor writes to TWR15 using I/O
write cycle
6 OBF3B 0
R/(W)* R Bidirectional Data Register Output Data Full
Indicates whether or not there is transmit data in
TWR0 to TWR15.
0: There is not transmit data in TWR15
[Clearing condition]
When the host processor reads TWR15 using I/O
read cycle, or the slave processor writes 0 to the
OBF3B bit
1: There is transmit data in TWR0 to TWR15
[Setting condition]
When the slave processor writes to TWR15
5 MWMF 0
R
R Master Write Mode Flag
Indicates that master write mode is entered by
writing to TWR0 from the host processor.
0: [Clearing condition]
When the slave processor reads TWR15
1: [Setting condition]
When the host processor writes to TWR0 using I/O
write cycle while SWMF = 0
Rev. 3.00, 03/04, page 532 of 830