HD64F2168 Datasheet, PDF (128/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

5.6 Interrupt Control Modes and Interrupt Operation
The interrupt controller has two modes: Interrupt control mode 0 and interrupt control mode 1.
Interrupt operations differ depending on the interrupt control mode. NMI interrupts and address
break interrupts are always accepted except for in reset state or in hardware standby mode. The
interrupt control mode is selected by SYSCR. Table 5.4 shows the interrupt control modes.
Table 5.4 Interrupt Control Modes
Interrupt
SYSCR
Control
Mode INTM1 INTM0
0
0
0
1
1
Priority
Setting
Registers
ICR
ICR
Interrupt
Mask Bits
I
I, UI
Description
Interrupt mask control is performed by
the I bit. Priority levels can be set with
ICR.
3-level interrupt mask control is
performed by the I and UI bits. Priority
levels can be set with ICR.
Figure 5.4 shows a block diagram of the priority decision circuit.
I UI
ICR
Interrupt
source
Interrupt
acceptance control
and 3-level mask
control
Default priority
determination
Vector
number
Interrupt control modes
0 and 1
Figure 5.4 Block Diagram of Interrupt Control Operation
Rev. 3.00, 03/04, page 88 of 830