HD64F2168 Datasheet, PDF (357/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Bit
Bit Name Initial Value R/W Description
5
OVF
0
R/(W)* Timer Overflow Flag
[Setting condition]
When TCNT_Y overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
4
ICIE
0
R/W Input Capture Interrupt Enable
[Setting condition]
Enables or disables the ICF interrupt request (ICIX)
when the ICF bit in TCSR_X is set to 1.
0: ICF interrupt request (ICIX) is disabled
1: ICF interrupt request (ICIX) is enabled
3
OS3
0
2
OS2
0
R/W Output Select 3 and 2
R/W _{These bits specify how the TMOY pin output level is}
to be changed by compare-match B of TCORB_Y
and TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
1
OS1
0
0
OS0
0
R/W Output Select 1 and 0
R/W _{These bits specify how the TMOY pin output level is}
to be changed by compare-match A of TCORA_Y
and TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Table: * Only 0 can be written, for flag clearing.
Rev. 3.00, 03/04, page 317 of 830