HD64F2168 Datasheet, PDF (623/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

clock must first be issued to the host. For details see section 16.4.8, LPC Interface Clock Start
Request.
16.4.8 LPC Interface Clock Start Request
A request to restart the clock (LCLK) can be sent to the host processor by means of the CLKRUN
pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested
since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host
interrupt request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is
sent to the host. The timing for this operation is shown in figure 16.11.
CLK
CLKRUN
1
2
3
4
5
6
Pull-up enable
Drive by the slave processor
Drive by the host processor
Figure 16.11 Clock Start or Speed-Up
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
Rev. 3.00, 03/04, page 583 of 830