HD64F2168 Datasheet, PDF (362/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

12.4 Operation
12.4.1 Pulse Output
Figure 12.3 shows an example for outputting an arbitrary duty pulse.
1. Clear the CCLR1 bit to 0 and set the CCLR0 bit to 1in TCR so that TCNT is cleared according
to the compare match of TCORA.
2. Set the OS3 to OS0 bits in TCSR to B'0110 so that 1 is output according to the compare match
of TCORA and 0 is output according to the compare match of TCORB.
According to the above settings, the waveforms with the TCORA cycle and TCORB pulse width
can be output without the intervention of software.
H'FF
TCORA
TCORB
H'00
TMO
TCNT
Counter clear
Figure 12.3 Pulse Output Example
Rev. 3.00, 03/04, page 322 of 830