HD64F2168 Datasheet, PDF (549/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

16.2 Input/Output Pins
Table 16.1 lists the input and output pins of the LPC.
Table 16.1 Pin Configuration
Name
Abbreviation Port
I/O
Function
LPC address/
data 3 to 0
LPC frame
LPC reset
LAD3 to LAD0 PE3 to
PE0
LFRAME
PE4
LRESET
PE5
I/O
Input*¹
Input*¹
Serial (4-signal-line) transfer cycle
type/address/data signals,
synchronized with LCLK
Transfer cycle start and forced
termination signal
LPC interface reset signal
LPC clock
LCLK
PE6
Serialized
SERIRQ
PE7
interrupt request
Input
I/O*¹
33 MHz PCI clock signal
Serialized host interrupt request
signal, synchronized with LCLK
(SMI, HIRQ1, HIRQ6, HIRQ9 to
HIRQ12)
LSCI general
LSCI
PD0
output
LSMI general
LSMI
PD1
output
PME general
PME
PD2
output
GATE A20
GA20
PD3
LPC clock run CLKRUN
PD4
LPC power-down LPCPD
PD5
Output*^1, *² General output
Output*^1, *² General output
Output*^1, *² General output
Output*^1, *²
I/O*^1, *²
Input*¹
A20 gate control signal output
LCLK restart request signal in case
of serial host interrupt request
LPC module shutdown signal
Notes: 1. Pin state monitoring input is possible in addition to the LPC interface control
input/output function.
2. Only 0 can be output. If 1 is output, the pin goes to the high-impedance state, so an
external resistor is necessary to pull the signal up to VCC.
Rev. 3.00, 03/04, page 509 of 830